Principal Engineer Digital Design (f/m/div)

Part of your life. Part of tomorrow.

We make life easier, safer and greener, with technology that achieves more, consumes less and is accessible to everyone. Microelectronics from Infineon is the key to a better future. Efficient use of energy, environmentally-friendly mobility and security in a connected world we solve some of the most critical challenges that our society faces while taking a conscientious approach to the use of natural resources. We seek 1 Principal Engineer Digital Design (f/m/div) HRC1844855

Your role

Key responsibilities in your new role

* Architectural and concept development, design, code in RTL, synthesize and integrate complex digital and mixed-signal blocks for automotive microcontroller IPs, with focus on system resources IPs like clocking and reset

* Conducting analysis of digital blocks performance in corner cases

* Own microarchitecture design, specification and maintenance

* Perform static timing analysis, and power/area / performance optimization, collaborating closely with the physical design team

* Work with verification teams to ensure block-level and system-level verification, addressing any issues identified

* Ensure designs comply with ISO 26262 and other automotive safety standards, implementing safety mechanisms as required

* Proactively identify and resolve technical risks and issues related to design, timing, or functionality

* Drive the development of scalable, reusable IPs to meet platform and project needs

* Lead a design team and collaborate with cross-functional teams, including system architects, software engineers, and validation teams, to ensure seamless product integration

Your profile

Qualifications and skills to help you succeed

* A degree (Bachelor/Master) in Electrical Engineering, Computer Engineering, or related field

* 8+ years of experience in digital design, with a focus on automotive, safety-critical systems, and power management systems

* Expertise in RTL coding using System Verilog, Verilog and VHDL

* Expertise in low-power design techniques, implemented as multi-power-, multi-clock, and multi-reset domain design

* Knowledge of synthesis, STA (static timing analysis), and power/performance / area trade-offs

* Experience with debug tools and familiarity with simulation/emulation methodologies

* Knowledge of automotive safety standards (ISO 26262) and experience implementing safety mechanisms are a plus

* Strong problem-solving skills and ability to work alone or in a team on complex tasks

* Excellent communication skills, with experience collaborating across teams

* Proficiency in English as an advantage

* Familiarity with infrastructure IPs of microcontrollers (power control, on-chip system monitoring and alarming...) and system-level design requirements

* Experience with DFT (Design for Testability)

Additional information by location

Austria

We offer competitive salaries and additional benefits based on your performance, experience, and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group I (https://www.feei.at/aktuelles/mindestloehne-und-gehaelter-eei/). The monthly salary is paid 14 times p.a. We offer a higher compensation depending on your expertise and skills.

Ihre schriftlichen Bewerbungsunterlagen senden sie bitte an : [email protected] Das Mindestentgelt für die Stelle als Principal Engineer Digital Design (f/m/div) beträgt 6.002,02 EUR brutto pro Monat auf Basis Vollzeitbeschäftigung.